This disclosure relates generally to semiconductor devices, and more specifically to semiconductor memory devices. In particular, the disclosure relates to memory, such as dynamic random access memory (DRAM). Information may be stored in memory cells, which may be organized into rows (word lines) and columns (bit lines). At various points in manufacturing and use of a memory device, one or more memory cells may fail (e.g., become unable to store information, be inaccessible by the memory device, etc.) and may need to be repaired.
The memory device may be directed to repair failed memory cells. The memory device may contain additional rows of memory (which may also be referred to as redundant rows) and additional columns of memory (redundant columns) which may be used in repair operations. During a repair operation, an address associated with the defective memory cells may be redirected, such that the address is now associated with a redundant row and/or column instead. It may be desirable to increase the reliability of repair operations.